| Phone 404-247-5878 Email hpark605@gatech.edu |
Research Interests
His research interests include ferroelectric thin films for next-generation nonvolatile memory and neuromorphic computing applications, negative capacitance in ferroelectric materials for steepslope transistors, and ultra-low contact resistance of metal-semiconductor junctions.
Postdoctoral Researcher
Bio
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Hyeon Woo Park received BS degrees in material science and engineering from Seoul National University, Seoul, Korea, in 2016. He received the PhD degree in material science and engineering at the Seoul National University, Korea, in 2021. He had worked as a postdoctoral researcher at the same university for 1 year. In 2023, he joined Georgia Tech’s STaR lab as a postdoctoral fellow.
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Selected Publications
1. Dipjyoti Das, † Hyeon Woo Park, † (co 1st author), Zekai Wang, Chengyang Zhang, Prasanna Venkatesan Ravindran, Chinsung Park, Nashrah Afroze, Po-Kai Hsu, Mengkun Tian, Hang Chen, Winston Chern, Suhwan Lim, Kwangsoo Kim, Kijoon Kim, Wanki Kim, Daewon Ha, Shimeng Yu, Suman Datta, Asif Khan “Experimental demonstration and modeling of an ferroelectric gate stack with a tunnel dielectric insert for ferroelectric NAND applications” in 2023 IEEE International Electron Device Meeting (IEDM) selected as a featured paper.
2. Hyeon Woo Park et al., “”Exploring the Physical Origin of the Negative Capacitance Effect in a Metal–Ferroelectric–Metal–Dielectric Structure””, Adv. Funct. Mater., 2304754 (2023)
3. Jae-Gil Lee,† Hyeon Woo Park,† (co 1st author), Joongsik Kim, Dong Ik Suh, Ildo Kim, Gwon Deok Han, Seung Wook Ryu, Seho Lee, Myung-Hee Na, Seon Yong Cha, Cheol Seong Hwang
“Memory Window Expansion for Ferroelectric FET based Multilevel NVM: Hybrid Solution with Combination of Polarization and Injected Charges”
2022 IEEE International Memory Workshop (IMW), pp. 1-4, (2022)
4. Hyeon Woo Park et al., “”Modeling of negative capacitance in ferroelectric thin films””, Advanced Materials, 1805266 (2019)”